Connect Halt Step Reset
Target - Unknown
Registers: Read now R0: -------- R1: -------- R2: -------- R3: -------- R4: -------- R5: -------- R6: -------- R7: -------- R8: -------- R9: -------- R10: -------- R11: -------- R12: -------- SP: -------- LR: -------- PC: -------- PSR: -------- MSP: -------- PSP: -------- Re-read registers on halt Read registers when polling (nonfunctional)
Disassembly Instruction Window Size
Memory Read now Read address (hex): Size (decimal): Re-read memory on halt Read memory when polling (nonfunctional)
Polling - Idle Off - never poll - only inspect the CPU after a user operation Running - poll for breakpoints, hard faults, and semihosting while the target is running Always - poll even while halted to check for external/watchdog resets Polling Interval (ms):
Semihosting - off Enable semihosting Semihosting output